Square chips on square panels – Silicon Box aims to break supply chain bottleneck with novel technology

The Singapore semiconductor startup is expected to ship more than a billion devices including advanced chiplet-based products this year

Lionel Lim
Published Wed, Apr 29, 2026 · 11:00 AM
    • Silicon Box packages square chips on square panels that have more than six times the productive area of standard 300 mm wafers.
    • Silicon Box packages square chips on square panels that have more than six times the productive area of standard 300 mm wafers. PHOTO: TAY CHU YI, BT

    [SINGAPORE] Singapore startup Silicon Box is looking to shake up the semiconductor industry and help ease the supply bottleneck. It aims to do so by fitting square chips on square panels instead of the current method of putting square chips on round wafers.

    “This company is very young, but we are shipping hundreds of products already. We cover many different areas: AI and high-performance computing, smartphones, robotics and aerospace,” said Han Byung Joon, the co-founder and CEO of Silicon Box.

    The Business Times understands that Silicon Box is expected to ship more than a billion devices including advanced chiplet-based units this year.

    It is estimated to have shipped 250 million devices at the end of the first quarter of this year, and is expected to ship 1.5 billion units cumulatively by October. It was founded in May 2021 in Singapore. 

    “If you look at where the AI supply chain has actually been bottlenecked in recent years, it’s not just the logic chips themselves. CoWos – the packaging technology – ...has been the real bottleneck,” said Galen Zeng, a senior research manager for semiconductors at the consultancy IDC.

    CoWoS stands for Chip on Wafer Substrate, which in layman’s terms is putting the square chips on a round wafer. 

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    Packaging where the industry is trying to move forward as it is seen as a viable pathway to produce more powerful chips essential for advanced artificial intelligence chip systems.

    This is especially so at a time when Moore’s Law appears to be hitting its physical limits. Moore’s Law was coined after Intel co-founder Gordon Moore, who observed that the number of transistors in a microchip would double every couple of years – meaning that a chip would become twice as powerful. 

    Currently, square chips are stacked on round wafers that measure 300 mm. It has traditionally been done on wafers as they serve as the backbone of the industry. Most of the tools and machinery have been made around working with wafers. 

    But fitting square chips onto a circular wafer means the full surface area of the wafer would not be utilised. That, plus the current chip bottleneck, has given rise to some companies trying a new way of packaging where panels are created, which would allow for more chips to be fitted. 

    One of these companies is Silicon Box.

    Silicon Box’s co-founder and CEO Han Byung Joon notes that the company is spending more than 50% of R&D in AI. PHOTO: TAY CHU YI, BT

    Silicon Box’s chief revenue officer Mike Han noted that revenue from the first three months of this year is already about three-quarters of 2025’s total revenue, and booked order production volume is 10 to 12 times more than 2025. 

    Traditionally, Silicon Box would be seen as an outsourced assembly and test (OSAT) company that specialises in processing wafers from foundries, then packaging and testing devices for clients. Yet where Silicon Box is arguably differentiated from other OSATs is its focus on chiplet integration with advanced packaging at scale with square panels. 

    Panel-level packaging – or putting square chips on panels – has been around for at least a decade, but most of the equipment is still made for packaging on circular wafers.

    The AI boom has increased interest in this space due to improved material efficiency and lower waste. Vertically integrated wafer foundries such as TSMC are also investing in panel-level packaging processes.

    “Silicon Box is one of the promising stars for a panel-based process,” said Bilal Hachemi, a senior technology and market analyst for semiconductor packaging at market research company Yole Group. 

    The Singapore startup currently packages square chips on square panels that have more than six times the productive area of standard 300 mm wafers.

    Hachemi credits the three founders of Silicon Box’s reputation and expertise in the industry for its success in acquiring investors and customers.

    Some of Silicon Box’s more prominent publicly known backers include the venture arms of major industry players such as Lam, UMC and TDK. 

    “Nobody makes semiconductor manufacturing as a startup because it’s capital intensive to start. We were in some sense naive because we knew too much about it (semiconductors) and had the confidence we can build something,” Han said. 

    But there is arguably demand for companies that are able to offer advanced packaging solutions.

    “Traditional transistor scaling is slowing down, and we’re hitting the physical limits. The industry needs a different way to keep improving performance – and that’s where advanced packaging comes in,” IDC’s Zeng said.

    Yole Group noted that the advanced packaging market is expected to reach US$79.4 billion by 2030.

    If Silicon Box can successfully scale its advanced packaging offerings in the AI space, then it could help ease some of the bottleneck by offering chip companies another solution.

    It could also give Singapore’s semiconductor sector more exposure to the leading edge manufacturing segment of the industry. 

    “We are probably spending more than 50 per cent of R&D in AI, which is a hot market, and important technology. We believe we have a better solution than what is available, so we are working, even as we speak, to make the product for many different clients,” Han said. 

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